Solid-state semiconductor devices are found in most electronic components today. For example, semiconductor lasers are important devices in applications such as optoelectronic communication systems and high-speed printing systems. There continues to be increased interest in vertical cavity surface emitting lasers (VCSELs) although edge emitting lasers are currently used in the vast majority of applications. A reason for the interest in VCSELs is that edge-emitting lasers produce a beam with a large angular divergence, making efficient collection of the emitted beam more difficult. Furthermore, edge emitting lasers cannot be tested until the wafer is cleaved into individual devices, the edges of which form the mirror facets of each device. On the other hand, not only does the beam of a VCSEL have a small angular divergence, a VCSEL emits light normal to the surface of the wafer. In addition, since VCSELs incorporate the mirrors monolithically in their design, they allow for on-wafer testing and the fabrication of one-dimensional or two-dimensional laser arrays. It is common for more than 60,000 semiconductor laser components to be fabricated on a single wafer.
VCSELs are typically made by growing several layers of reflective material on a substrate material. VCSELs include a first mirrored stack, formed on the substrate by semiconductor manufacturing techniques, an active region, formed on top of the first mirrored stack, and a second mirrored stack, formed on top of the active region. By providing a first contact on top of the second mirrored stack, and a second contact on the backside of the substrate, a current is forced through the active region, thus driving the VCSEL. VCSELs can be fabricated/grown with combinations of gallium, arsinide, nitrogen, aluminum, antimony, phosphorous and/or indium placed within or about a typical GaAs substrate.
Historically, the manufacturing of semiconductors has been a very elaborate and expensive multi-step process. Component burn-in generally refers to the process of thermally and/or electrically testing newly fabricated semiconductor components. Burn-in allows for the individual identification of faulty components coming for a lot or batch. Currently, components are burned-in at the “package level”, which means that the individually-packaged devices are typically tested after being derived from a wafer. Each component is tested and placed in sockets to be burned-in either as a packaged unit or to be tested as bare die (before packaging). Either die or package level burn-in can be costly for manufacturers because it is labor intensive. Each component has to be tested, requiring plenary human intervention.
Although wafer level burn-in (WLBI) methods and systems are currently being explored by the semiconductor industry, proposed systems and methods generally require that a plurality of electrical probes contact a plurality of electrical contacts on a wafer. Such systems can be complex and require extra care with regard to probe and contact alignment. For example, U.S. Pat. No. 6,339,329 issued to Nakata et al., entitled “Method of testing electrical characteristics of multiple semiconductor integrated circuits simultaneously”, is typical of the technological direction being taken in the industry for WLBI. The Nakata et al. patent teaches simultaneous testing of a plurality of semiconductor integrated circuit elements by bringing a plurality of probe terminals into contact with a plurality of testing electrodes associated respectively with a plurality of semiconductor integrated circuit elements on a wafer and applying a voltage to each of the testing electrodes from the common voltage supply line via a plurality of positive temperature coefficient elements.
The semiconductor fabrication industry needs methods and systems for reducing the costs and associated labor currently required to carry out device burn-in. Further, the semiconductor industry needs a wafer level burn-in (WLBI) method and systems that can be used in the manufacturing and test of semiconductor components having front and back contacts, such as VCSELs, diodes, LEDs, and other semiconductor devices. The present inventors have recognized that it would be advantageous to remedy current burn-in procedures by providing methods and systems of accomplishing wafer level burn-in of components. Accordingly, the present invention is described and presented as a novel method and means to address the shortcomings currently found in the art.